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Quite minimal patchset to help to save some more power - put unused PCI devices (devices with no drivers) into D3 state. Device has to support it of course. Obtained-from: FreeBSD
Create an #include layer for bus/pci and bus/isa so source files do not have to dive into bus/xxx/i386 to access header files.
If PCI_MAP_FIXUP is defined, following fixes will be applied:
- For PCI/PCI bridge, adjust requested IO port/memory's start/range according
to bridge's base/limit register value.
- For Host/PCI bridge, if requested IO port/memory's starts from 0 and range
is ~0,
o If the request is for IO port, the start address is set to 0x1000.
o If the request is for IO memory, the start address is set to tunable
hw.pci.host_mem_start, which is 0x80000000 by default.
This unbreaks cardbus bridge support, if PCI_MAP_FIXUP is defined.
My laptop's cardbus bridge is on the PCI bus mastered by a PCI/PCI bridge,
while swildner@'s laptop's cardbus bridge is on the PCI bus mastered by
Host/PCI bridge.
Tested-by: swildner@ and me
Obtained-from: FreeBSD (imp@freebsd.org)
#
# It seems BIOS does not set cardbus bridge's BAR for most of the system,
# so in the original code, the resource_list_alloc() in pci_alloc_resource()
# will return NULL for cardbus bridge's IO memory allocation request; cardbus
# bridge's code actually depends on that to reallocate IO memory using
# hw.cbb.start_memory as start address.
#
# Before this commit, if PCI_MAP_FIXUP is defined, cardbus bridge's invalid
# IO memory request will be delivered to various PCI bridge code, which does
# not validate/fixup the request and returns "successful" result bindly.
#
Implement kern.do_async_attach. default disabled. To enable add
kern.do_async_attach="1" to your /boot/loader.conf. This feature allows
conforming drivers to attach in their own thread, allowing multiple
drivers to attach in parallel.
Implement a new device state, DS_INPROGRESS. Seems to work properly.
Implement device_set_async_attach(), which allows a device's probe
function to indicate that it is ok for its attach function to be run in
its own thread.
Split tsleep's enable out from the 'cold' variable. tsleep works earlier
then when cold is cleared. Add a 'tsleep_now_works' variable to take
over the functionality.
Implement DRIVERSLEEP()... similar to DELAY(), this function works in
any context and will call lwkt_switch() in its spin loop. It isn't perfect
yet.
ATA/NATA:
* Uses the new async attach feature
* Uses DRIVERSLEEP
* No longer uses a configuration interrupt hook. Interrupts are now
available during device config.
NOTE: atapicam does not seem to be scanning the 'bus' (from cam's point
of view), so 'cd0' is not found until CAM scans the bus itself in the
interrupt config hook code.
USB:
* Uses the new async attach feature
* Uses tsleep instead of DELAY
MISC:
* IF_EM, IF_NFE also use the async attach feature as a test, but it
doesn't seem to have a huge effect.
Remove an old debugging kprintf.
Rename printf -> kprintf in sys/ and add some defines where necessary (files which are used in userland, too).
Rename malloc->kmalloc, free->kfree, and realloc->krealloc. Pass 1
Add another parameter to BUS_ADD_CHILD to allow children to inherit code from grandparents. Formalize and document the IDENTIFY mechanism and actually use it properly to add PCI busses rather then the severe hacks that existed before. Instead of attaching PCI busses (pcib) directly to nexus, create a pass-through bus layer under nexus called 'legacypci' and attach the PCI busses to that. Use the new BUS_ADD_CHILD and IVARS recursion capability to still allow the pcib's under legacypci to get nexus generated IVARS. NOTE ON IVARS: These can be utterly confusing because a BUS device may manage and control the IVARS attached to its children. In addition, if the BUS method for the device accessing the IVARs does not properly match up with or recurse to the device that actually created the ivars, mass confusion can result. I have attempted to document the issue but XXX it needs some sanity check code. Add a 'pcib_owner' global that is used to determine which of the several possible PCI mainbus subsystems actually own the PCI mainbus. This is not yet tied into ACPI but will be soon. No longer add legacy "pcib" busses if it is detected that another subsystem controls the mainbus. Before the busses were added but then simply not scanned later on, creating confusing pcibX designations. Now the busses aren't added... legacypci stops cold if it doesn't own the PCI mainbus. Get rid of the twisted checks for "pci" devices that used to handle this job. Document many aspects of the PCI code and redo some of the APIs slightly to make them more obvious. In particular, document the odd fact that pci_*() accessor function actually operate on a pci function code based sub-device of the "pci" driver and call device_get_parent() to get to the pci" driver layer. This sub layer really needs its own formal designation. Change "pciX" attachments to "pcibY" busses. Use the secondary bus id for 'X' and require it to be unique. Also reorder "pcibY" attachments so the physical bus number tends to (but is not guarenteed to be) the same 'Y' in pcibY. Change IVARS access for bridges. Require that the device representing the "pcib" device be passed to pcib_get/set_*() routines instead of children of said device. Add a function devclass_find_unit() to shortcut the more complex operation of locating the devclass by name and then getting the device relative to the devclass. Add numerous bus_generic_*() BUS methods which now recurse through the parent instead of terminate with an error.
Cleanup some of the newbus infrastructure. * Change the device_identify API to return success/failure, like most of the other newbus methods. This may be used for conflict resolution in the future. * Clearly document the device_identify method and formalize its use by adding discrimination between initial bus probes and bus rescans. Do not re-execute static identification code that has already been run every time a new driver is added at run-time. * Clearly document the do-ISA-last hack. * Provide generic routines for the most common device_identify operations (psueo or synthesized devices that operate under other devices, such as lpt operating under ppbus, which are not 'scanned' by the parent bus). * Remove the hacks that install and initialize the nexus device. Instead, use the existing DRIVER_MODULE infrastructure to install nexus under root_bus. * Document the boot-time initialization path so it doesn't take the next guy 8 hours to figure out what code is actually being run when.
Add support for ServerWorks chipsets. Obtained-from: FreeBSD
Return a low priority for the "hostb%d" catch-all for pci busses, which will allow compiled-in bus device drivers such as AGP to attach first. Without this the probe order is half hazzard and in particular SMP boxes may attach "hostb" first, preventing AGP from attaching. Note that AGP will still not load properly from loader.conf or after booting with kldload. Removing the "hostb" catch-all entirely solves that problem but some additional investigation must be done first. AGP-problems-reported-by: Adam K Kirchhoff <adamk@voicenet.com>
Synchronize a bunch of things from FreeBSD-5 in preparation for the new ACPICA driver support. * Bring in a lot of new bus and pci DEV_METHODs from FreeBSD-5 * split apic.h into apicreg.h and apicio.h * rename INTR_TYPE_FAST -> INTR_FAST and move the #define * rename INTR_TYPE_EXCL -> INTR_EXCL and move the #define * rename some PCIR_ registers and add additional macros from FreeBSD-5 * note: new pcib bus call, host_pcib_get_busno() imported. * kern/subr_power.c no longer optional. Other changes: * machine/smp.h machine smp/smptests.h can now be #included unconditionally, and some APIC_IO vs SMP separation has been done as well. * gd_acpi_id and gd_apic_id added to machine/globaldata.h prep for new ACPI code. Despite all the changes, the generated code should be virtually the same. These were mostly additions which the pre-existing code does not (yet) use.
Add PCI busses to the device list in bus number order to make debug output more understandable.
Merge from FreeBSD: Skip all devices whose header type is > 2; '0' is normal, '1' is a PCI Bridge and '2' is a Cardbus bridge. Those are PCI 2.2 defines.
Add comment for nexus_pcib_write_config.
Use nexus_pcib_read_config instead of pci_cfgread. Do some cleanup.
Add pcib interface methods. Add device to catch the PCI bridges to stop them showing up twice. Add black hole device for the PCI bus PnP ID.
Sync pci_cfgreg.c with FreeBSD 5, rev. 1.101. This makes the PCI interrupt routing code more robust. Also copied pci_cfgreg.h into bus/pci/i386, the other instance in machine/pci_cfgreg.h will go later.
kernel tree reorganization stage 1: Major cvs repository work (not logged as
commits) plus a major reworking of the #include's to accomodate the
relocations.
* CVS repository files manually moved. Old directories left intact
and empty (temporary).
* Reorganize all filesystems into vfs/, most devices into dev/,
sub-divide devices by function.
* Begin to move device-specific architecture files to the device
subdirs rather then throwing them all into, e.g. i386/include
* Reorganize files related to system busses, placing the related code
in a new bus/ directory. Also move cam to bus/cam though this may
not have been the best idea in retrospect.
* Reorganize emulation code and place it in a new emulation/ directory.
* Remove the -I- compiler option in order to allow #include file
localization, rename all config generated X.h files to use_X.h to
clean up the conflicts.
* Remove /usr/src/include (or /usr/include) dependancies during the
kernel build, beyond what is normally needed to compile helper
programs.
* Make config create 'machine' softlinks for architecture specific
directories outside of the standard <arch>/include.
* Bump the config rev.
WARNING! after this commit /usr/include and /usr/src/sys/compile/*
should be regenerated from scratch.
Add the DragonFly cvs id and perform general cleanups on cvs/rcs/sccs ids. Most ids have been removed from !lint sections and moved into comment sections.
import from FreeBSD RELENG_4 1.57.2.11