File:  [DragonFly] / src / sys / dev / misc / ppi / ppi.c
Revision 1.8: download - view: text, annotated - select for diffs
Wed May 19 22:52:43 2004 UTC (10 years, 4 months ago) by dillon
Branches: MAIN
CVS tags: HEAD, DragonFly_Stable, DragonFly_Snap29Sep2004, DragonFly_Snap13Sep2004, DragonFly_RELEASE_1_2_Slip, DragonFly_RELEASE_1_2, DragonFly_1_0_REL, DragonFly_1_0_RC1, DragonFly_1_0A_REL
Device layer rollup commit.

* cdevsw_add() is now required.  cdevsw_add() and cdevsw_remove() may specify
  a mask/match indicating the range of supported minor numbers.  Multiple
  cdevsw_add()'s using the same major number, but distinctly different
  ranges, may be issued.  All devices that failed to call cdevsw_add() before
  now do.

* cdevsw_remove() now automatically marks all devices within its supported
  range as being destroyed.

* vnode->v_rdev is no longer resolved when the vnode is created.  Instead,
  only v_udev (a newly added field) is resolved.  v_rdev is resolved when
  the vnode is opened and cleared on the last close.

* A great deal of code was making rather dubious assumptions with regards
  to the validity of devices associated with vnodes, primarily due to
  the persistence of a device structure due to being indexed by (major, minor)
  instead of by (cdevsw, major, minor).  In particular, if you run a program
  which connects to a USB device and then you pull the USB device and plug
  it back in, the vnode subsystem will continue to believe that the device
  is open when, in fact, it isn't (because it was destroyed and recreated).

  In particular, note that all the VFS mount procedures now check devices
  via v_udev instead of v_rdev prior to calling VOP_OPEN(), since v_rdev
  is NULL prior to the first open.

* The disk layer's device interaction has been rewritten.  The disk layer
  (i.e. the slice and disklabel management layer) no longer overloads
  its data onto the device structure representing the underlying physical
  disk.  Instead, the disk layer uses the new cdevsw_add() functionality
  to register its own cdevsw using the underlying device's major number,
  and simply does NOT register the underlying device's cdevsw.  No
  confusion is created because the device hash is now based on
  (cdevsw,major,minor) rather then (major,minor).

  NOTE: This also means that underlying raw disk devices may use the entire
  device minor number instead of having to reserve the bits used by the disk
  layer, and also means that can we (theoretically) stack a fully
  disklabel-supported 'disk' on top of any block device.

* The new reference counting scheme prevents this by associating a device
  with a cdevsw and disconnecting the device from its cdevsw when the cdevsw
  is removed.  Additionally, all udev2dev() lookups run through the cdevsw
  mask/match and only successfully find devices still associated with an
  active cdevsw.

* Major work on MFS:  MFS no longer shortcuts vnode and device creation.  It
  now creates a real vnode and a real device and implements real open and
  close VOPs.  Additionally, due to the disk layer changes, MFS is no longer
  limited to 255 mounts.  The new limit is 16 million.  Since MFS creates a
  real device node, mount_mfs will now create a real /dev/mfs<PID> device
  that can be read from userland (e.g. so you can dump an MFS filesystem).

* BUF AND DEVICE STRATEGY changes.  The struct buf contains a b_dev field.
  In order to properly handle stacked devices we now require that the b_dev
  field be initialized before the device strategy routine is called.  This
  required some additional work in various VFS implementations.  To enforce
  this requirement, biodone() now sets b_dev to NODEV.  The new disk layer
  will adjust b_dev before forwarding a request to the actual physical
  device.

* A bug in the ISO CD boot sequence which resulted in a panic has been fixed.

Testing by: lots of people, but David Rhodus found the most aggregious bugs.

    1: /*-
    2:  * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
    3:  * All rights reserved.
    4:  *
    5:  * Redistribution and use in source and binary forms, with or without
    6:  * modification, are permitted provided that the following conditions
    7:  * are met:
    8:  * 1. Redistributions of source code must retain the above copyright
    9:  *    notice, this list of conditions and the following disclaimer.
   10:  * 2. Redistributions in binary form must reproduce the above copyright
   11:  *    notice, this list of conditions and the following disclaimer in the
   12:  *    documentation and/or other materials provided with the distribution.
   13:  *
   14:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24:  * SUCH DAMAGE.
   25:  *
   26:  * $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $
   27:  * $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.8 2004/05/19 22:52:43 dillon Exp $
   28:  *
   29:  */
   30: #include "opt_ppb_1284.h"
   31: 
   32: #include <sys/param.h>
   33: #include <sys/systm.h>
   34: #include <sys/module.h>
   35: #include <sys/bus.h>
   36: #include <sys/conf.h>
   37: #include <sys/kernel.h>
   38: #include <sys/uio.h>
   39: #include <sys/fcntl.h>
   40: 
   41: #include <machine/clock.h>
   42: #include <machine/bus.h>
   43: #include <machine/resource.h>
   44: #include <sys/rman.h>
   45: 
   46: #include <bus/ppbus/ppbconf.h>
   47: #include <bus/ppbus/ppb_msq.h>
   48: 
   49: #ifdef PERIPH_1284
   50: #include <bus/ppbus/ppb_1284.h>
   51: #endif
   52: 
   53: #include "ppi.h"
   54: 
   55: #include "ppbus_if.h"
   56: 
   57: #include <bus/ppbus/ppbio.h>
   58: 
   59: #define BUFSIZE		512
   60: 
   61: struct ppi_data {
   62: 
   63:     int		ppi_unit;
   64:     int		ppi_flags;
   65: #define HAVE_PPBUS	(1<<0)
   66: #define HAD_PPBUS	(1<<1)
   67: 
   68:     int		ppi_count;
   69:     int		ppi_mode;			/* IEEE1284 mode */
   70:     char	ppi_buffer[BUFSIZE];
   71: 
   72: #ifdef PERIPH_1284
   73:     struct resource *intr_resource;	/* interrupt resource */
   74:     void *intr_cookie;			/* interrupt registration cookie */
   75: #endif /* PERIPH_1284 */
   76: };
   77: 
   78: #define DEVTOSOFTC(dev) \
   79: 	((struct ppi_data *)device_get_softc(dev))
   80: #define UNITOSOFTC(unit) \
   81: 	((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
   82: #define UNITODEVICE(unit) \
   83: 	(devclass_get_device(ppi_devclass, (unit)))
   84: 
   85: static devclass_t ppi_devclass;
   86: 
   87: static	d_open_t	ppiopen;
   88: static	d_close_t	ppiclose;
   89: static	d_ioctl_t	ppiioctl;
   90: static	d_write_t	ppiwrite;
   91: static	d_read_t	ppiread;
   92: 
   93: #define CDEV_MAJOR 82
   94: static struct cdevsw ppi_cdevsw = {
   95: 	/* name */	"ppi",
   96: 	/* maj */	CDEV_MAJOR,
   97: 	/* flags */	0,
   98: 	/* port */	NULL,
   99: 	/* clone */	NULL,
  100: 
  101: 	/* open */	ppiopen,
  102: 	/* close */	ppiclose,
  103: 	/* read */	ppiread,
  104: 	/* write */	ppiwrite,
  105: 	/* ioctl */	ppiioctl,
  106: 	/* poll */	nopoll,
  107: 	/* mmap */	nommap,
  108: 	/* strategy */	nostrategy,
  109: 	/* dump */	nodump,
  110: 	/* psize */	nopsize
  111: };
  112: 
  113: #ifdef PERIPH_1284
  114: 
  115: static void
  116: ppi_enable_intr(device_t ppidev)
  117: {
  118: 	char r;
  119: 	device_t ppbus = device_get_parent(ppidev);
  120: 
  121: 	r = ppb_rctr(ppbus);
  122: 	ppb_wctr(ppbus, r | IRQENABLE);
  123: 
  124: 	return;
  125: }
  126: 
  127: static void
  128: ppi_disable_intr(device_t ppidev)
  129: {
  130: 	char r;
  131:         device_t ppbus = device_get_parent(ppidev);
  132: 
  133: 	r = ppb_rctr(ppbus);
  134: 	ppb_wctr(ppbus, r & ~IRQENABLE);
  135: 
  136: 	return;
  137: }
  138: 
  139: #endif /* PERIPH_1284 */
  140: 
  141: static void
  142: ppi_identify(driver_t *driver, device_t parent)
  143: {
  144: 
  145: 	BUS_ADD_CHILD(parent, 0, "ppi", 0);
  146: }
  147: 
  148: /*
  149:  * ppi_probe()
  150:  */
  151: static int
  152: ppi_probe(device_t dev)
  153: {
  154: 	struct ppi_data *ppi;
  155: 
  156: 	/* probe is always ok */
  157: 	device_set_desc(dev, "Parallel I/O");
  158: 
  159: 	ppi = DEVTOSOFTC(dev);
  160: 	bzero(ppi, sizeof(struct ppi_data));
  161: 
  162: 	return (0);
  163: }
  164: 
  165: /*
  166:  * ppi_attach()
  167:  */
  168: static int
  169: ppi_attach(device_t dev)
  170: {
  171: #ifdef PERIPH_1284
  172: 	uintptr_t irq;
  173: 	int zero = 0;
  174: 	struct ppi_data *ppi = DEVTOSOFTC(dev);
  175: 
  176: 	/* retrive the irq */
  177: 	BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);
  178: 
  179: 	/* declare our interrupt handler */
  180: 	ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
  181: 						&zero, irq, irq, 1, RF_ACTIVE);
  182: #endif /* PERIPH_1284 */
  183: 
  184: 	cdevsw_add(&ppi_cdevsw, -1, device_get_unit(dev));
  185: 	make_dev(&ppi_cdevsw, device_get_unit(dev),	/* XXX cleanup */
  186: 		 UID_ROOT, GID_WHEEL,
  187: 		 0600, "ppi%d", device_get_unit(dev));
  188: 
  189: 	return (0);
  190: }
  191: 
  192: #ifdef PERIPH_1284
  193: /*
  194:  * Cable
  195:  * -----
  196:  *
  197:  * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
  198:  *
  199:  * nStrobe   <-> nAck		1  <-> 10
  200:  * nAutofd   <-> Busy		11 <-> 14
  201:  * nSelectin <-> Select		17 <-> 13
  202:  * nInit     <-> nFault		15 <-> 16
  203:  *
  204:  */
  205: static void
  206: ppiintr(void *arg)
  207: {
  208: 	device_t ppidev = (device_t)arg;
  209:         device_t ppbus = device_get_parent(ppidev);
  210: 	struct ppi_data *ppi = DEVTOSOFTC(ppidev);
  211: 
  212: 	ppi_disable_intr(ppidev);
  213: 
  214: 	switch (ppb_1284_get_state(ppbus)) {
  215: 
  216: 	/* accept IEEE1284 negociation then wakeup an waiting process to
  217: 	 * continue negociation at process level */
  218: 	case PPB_FORWARD_IDLE:
  219: 		/* Event 1 */
  220: 		if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
  221: 							(SELECT | nBUSY)) {
  222: 			/* IEEE1284 negociation */
  223: #ifdef DEBUG_1284
  224: 			printf("N");
  225: #endif
  226: 
  227: 			/* Event 2 - prepare for reading the ext. value */
  228: 			ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);
  229: 
  230: 			ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
  231: 
  232: 		} else {
  233: #ifdef DEBUG_1284
  234: 			printf("0x%x", ppb_rstr(ppbus));
  235: #endif
  236: 			ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
  237: 			break;
  238: 		}
  239: 
  240: 		/* wake up any process waiting for negociation from
  241: 		 * remote master host */
  242: 
  243: 		/* XXX should set a variable to warn the process about
  244: 		 * the interrupt */
  245: 
  246: 		wakeup(ppi);
  247: 		break;
  248: 	default:
  249: #ifdef DEBUG_1284
  250: 		printf("?%d", ppb_1284_get_state(ppbus));
  251: #endif
  252: 		ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
  253: 		ppb_set_mode(ppbus, PPB_COMPATIBLE);
  254: 		break;
  255: 	}
  256: 
  257: 	ppi_enable_intr(ppidev);
  258: 
  259: 	return;
  260: }
  261: #endif /* PERIPH_1284 */
  262: 
  263: static int
  264: ppiopen(dev_t dev, int flags, int fmt, d_thread_t *td)
  265: {
  266: 	u_int unit = minor(dev);
  267: 	struct ppi_data *ppi = UNITOSOFTC(unit);
  268: 	device_t ppidev = UNITODEVICE(unit);
  269:         device_t ppbus = device_get_parent(ppidev);
  270: 	int res;
  271: 
  272: 	if (!ppi)
  273: 		return (ENXIO);
  274: 
  275: 	if (!(ppi->ppi_flags & HAVE_PPBUS)) {
  276: 		if ((res = ppb_request_bus(ppbus, ppidev,
  277: 			(flags & O_NONBLOCK) ? PPB_DONTWAIT :
  278: 						(PPB_WAIT | PPB_INTR))))
  279: 			return (res);
  280: 
  281: 		ppi->ppi_flags |= HAVE_PPBUS;
  282: 
  283: #ifdef PERIPH_1284
  284: 		if (ppi->intr_resource) {
  285: 			/* register our interrupt handler */
  286: 			BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource,
  287: 				       INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie);
  288: 		}
  289: #endif /* PERIPH_1284 */
  290: 	}
  291: 	ppi->ppi_count += 1;
  292: 
  293: 	return (0);
  294: }
  295: 
  296: static int
  297: ppiclose(dev_t dev, int flags, int fmt, d_thread_t *td)
  298: {
  299: 	u_int unit = minor(dev);
  300: 	struct ppi_data *ppi = UNITOSOFTC(unit);
  301: 	device_t ppidev = UNITODEVICE(unit);
  302:         device_t ppbus = device_get_parent(ppidev);
  303: 
  304: 	ppi->ppi_count --;
  305: 	if (!ppi->ppi_count) {
  306: 
  307: #ifdef PERIPH_1284
  308: 		switch (ppb_1284_get_state(ppbus)) {
  309: 		case PPB_PERIPHERAL_IDLE:
  310: 			ppb_peripheral_terminate(ppbus, 0);
  311: 			break;
  312: 		case PPB_REVERSE_IDLE:
  313: 		case PPB_EPP_IDLE:
  314: 		case PPB_ECP_FORWARD_IDLE:
  315: 		default:
  316: 			ppb_1284_terminate(ppbus);
  317: 			break;
  318: 		}
  319: #endif /* PERIPH_1284 */
  320: 
  321: 		/* unregistration of interrupt forced by release */
  322: 		ppb_release_bus(ppbus, ppidev);
  323: 
  324: 		ppi->ppi_flags &= ~HAVE_PPBUS;
  325: 	}
  326: 
  327: 	return (0);
  328: }
  329: 
  330: /*
  331:  * ppiread()
  332:  *
  333:  * IEEE1284 compliant read.
  334:  *
  335:  * First, try negociation to BYTE then NIBBLE mode
  336:  * If no data is available, wait for it otherwise transfer as much as possible
  337:  */
  338: static int
  339: ppiread(dev_t dev, struct uio *uio, int ioflag)
  340: {
  341: #ifdef PERIPH_1284
  342: 	u_int unit = minor(dev);
  343: 	struct ppi_data *ppi = UNITOSOFTC(unit);
  344: 	device_t ppidev = UNITODEVICE(unit);
  345:         device_t ppbus = device_get_parent(ppidev);
  346: 	int len, error = 0;
  347: 
  348: 	switch (ppb_1284_get_state(ppbus)) {
  349: 	case PPB_PERIPHERAL_IDLE:
  350: 		ppb_peripheral_terminate(ppbus, 0);
  351: 		/* fall throught */
  352: 
  353: 	case PPB_FORWARD_IDLE:
  354: 		/* if can't negociate NIBBLE mode then try BYTE mode,
  355: 		 * the peripheral may be a computer
  356: 		 */
  357: 		if ((ppb_1284_negociate(ppbus,
  358: 			ppi->ppi_mode = PPB_NIBBLE, 0))) {
  359: 
  360: 			/* XXX Wait 2 seconds to let the remote host some
  361: 			 * time to terminate its interrupt
  362: 			 */
  363: 			tsleep(ppi, 0, "ppiread", 2*hz);
  364: 			
  365: 			if ((error = ppb_1284_negociate(ppbus,
  366: 				ppi->ppi_mode = PPB_BYTE, 0)))
  367: 				return (error);
  368: 		}
  369: 		break;
  370: 
  371: 	case PPB_REVERSE_IDLE:
  372: 	case PPB_EPP_IDLE:
  373: 	case PPB_ECP_FORWARD_IDLE:
  374: 	default:
  375: 		break;
  376: 	}
  377: 
  378: #ifdef DEBUG_1284
  379: 	printf("N");
  380: #endif
  381: 	/* read data */
  382: 	len = 0;
  383: 	while (uio->uio_resid) {
  384: 		if ((error = ppb_1284_read(ppbus, ppi->ppi_mode,
  385: 			ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
  386: 			&len))) {
  387: 			goto error;
  388: 		}
  389: 
  390: 		if (!len)
  391: 			goto error;		/* no more data */
  392: 
  393: #ifdef DEBUG_1284
  394: 		printf("d");
  395: #endif
  396: 		if ((error = uiomove(ppi->ppi_buffer, len, uio)))
  397: 			goto error;
  398: 	}
  399: 
  400: error:
  401: 
  402: #else /* PERIPH_1284 */
  403: 	int error = ENODEV;
  404: #endif
  405: 
  406: 	return (error);
  407: }
  408: 
  409: /*
  410:  * ppiwrite()
  411:  *
  412:  * IEEE1284 compliant write
  413:  *
  414:  * Actually, this is the peripheral side of a remote IEEE1284 read
  415:  *
  416:  * The first part of the negociation (IEEE1284 device detection) is
  417:  * done at interrupt level, then the remaining is done by the writing
  418:  * process
  419:  *
  420:  * Once negociation done, transfer data
  421:  */
  422: static int
  423: ppiwrite(dev_t dev, struct uio *uio, int ioflag)
  424: {
  425: #ifdef PERIPH_1284
  426: 	u_int unit = minor(dev);
  427: 	struct ppi_data *ppi = UNITOSOFTC(unit);
  428: 	device_t ppidev = UNITODEVICE(unit);
  429:         device_t ppbus = device_get_parent(ppidev);
  430: 	int len, error = 0, sent;
  431: 
  432: #if 0
  433: 	int ret;
  434: 
  435: 	#define ADDRESS		MS_PARAM(0, 0, MS_TYP_PTR)
  436: 	#define LENGTH		MS_PARAM(0, 1, MS_TYP_INT)
  437: 
  438: 	struct ppb_microseq msq[] = {
  439: 		  { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
  440: 		  MS_RET(0)
  441: 	};
  442: 
  443: 	/* negociate ECP mode */
  444: 	if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
  445: 		printf("ppiwrite: ECP negociation failed\n");
  446: 	}
  447: 
  448: 	while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
  449: 		uiomove(ppi->ppi_buffer, len, uio);
  450: 
  451: 		ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
  452: 
  453: 		error = ppb_MS_microseq(ppbus, msq, &ret);
  454: 	}
  455: #endif
  456: 
  457: 	/* we have to be peripheral to be able to send data, so
  458: 	 * wait for the appropriate state
  459: 	 */
  460:  	if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
  461: 		ppb_1284_terminate(ppbus);
  462: 
  463:  	while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
  464: 		/* XXX should check a variable before sleeping */
  465: #ifdef DEBUG_1284
  466: 		printf("s");
  467: #endif
  468: 
  469: 		ppi_enable_intr(ppidev);
  470: 
  471: 		/* sleep until IEEE1284 negociation starts */
  472: 		error = tsleep(ppi, PCATCH, "ppiwrite", 0);
  473: 
  474: 		switch (error) {
  475: 		case 0:
  476: 			/* negociate peripheral side with BYTE mode */
  477: 			ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
  478: 			break;
  479: 		case EWOULDBLOCK:
  480: 			break;
  481: 		default:
  482: 			goto error;
  483: 		}
  484: 	}
  485: #ifdef DEBUG_1284
  486: 	printf("N");
  487: #endif
  488: 
  489: 	/* negociation done, write bytes to master host */
  490: 	while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
  491: 		uiomove(ppi->ppi_buffer, len, uio);
  492: 		if ((error = byte_peripheral_write(ppbus,
  493: 						ppi->ppi_buffer, len, &sent)))
  494: 			goto error;
  495: #ifdef DEBUG_1284
  496: 		printf("d");
  497: #endif
  498: 	}
  499: 
  500: error:
  501: 
  502: #else /* PERIPH_1284 */
  503: 	int error = ENODEV;
  504: #endif
  505: 
  506: 	return (error);
  507: }
  508: 
  509: static int
  510: ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, d_thread_t *td)
  511: {
  512: 	u_int unit = minor(dev);
  513: 	device_t ppidev = UNITODEVICE(unit);
  514:         device_t ppbus = device_get_parent(ppidev);
  515: 	int error = 0;
  516: 	u_int8_t *val = (u_int8_t *)data;
  517: 
  518: 	switch (cmd) {
  519: 
  520: 	case PPIGDATA:			/* get data register */
  521: 		*val = ppb_rdtr(ppbus);
  522: 		break;
  523: 	case PPIGSTATUS:		/* get status bits */
  524: 		*val = ppb_rstr(ppbus);
  525: 		break;
  526: 	case PPIGCTRL:			/* get control bits */
  527: 		*val = ppb_rctr(ppbus);
  528: 		break;
  529: 	case PPIGEPPD:			/* get EPP data bits */
  530: 		*val = ppb_repp_D(ppbus);
  531: 		break;
  532: 	case PPIGECR:			/* get ECP bits */
  533: 		*val = ppb_recr(ppbus);
  534: 		break;
  535: 	case PPIGFIFO:			/* read FIFO */
  536: 		*val = ppb_rfifo(ppbus);
  537: 		break;
  538: 	case PPISDATA:			/* set data register */
  539: 		ppb_wdtr(ppbus, *val);
  540: 		break;
  541: 	case PPISSTATUS:		/* set status bits */
  542: 		ppb_wstr(ppbus, *val);
  543: 		break;
  544: 	case PPISCTRL:			/* set control bits */
  545: 		ppb_wctr(ppbus, *val);
  546: 		break;
  547: 	case PPISEPPD:			/* set EPP data bits */
  548: 		ppb_wepp_D(ppbus, *val);
  549: 		break;
  550: 	case PPISECR:			/* set ECP bits */
  551: 		ppb_wecr(ppbus, *val);
  552: 		break;
  553: 	case PPISFIFO:			/* write FIFO */
  554: 		ppb_wfifo(ppbus, *val);
  555: 		break;
  556: 	case PPIGEPPA:			/* get EPP address bits */
  557: 		*val = ppb_repp_A(ppbus);
  558: 		break;
  559: 	case PPISEPPA:			/* set EPP address bits */
  560: 		ppb_wepp_A(ppbus, *val);
  561: 		break;
  562: 	default:
  563: 		error = ENOTTY;
  564: 		break;
  565: 	}
  566:     
  567: 	return (error);
  568: }
  569: 
  570: static device_method_t ppi_methods[] = {
  571: 	/* device interface */
  572: 	DEVMETHOD(device_identify,	ppi_identify),
  573: 	DEVMETHOD(device_probe,		ppi_probe),
  574: 	DEVMETHOD(device_attach,	ppi_attach),
  575: 
  576: 	{ 0, 0 }
  577: };
  578: 
  579: static driver_t ppi_driver = {
  580: 	"ppi",
  581: 	ppi_methods,
  582: 	sizeof(struct ppi_data),
  583: };
  584: DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);