1: /*
2: * Copyright (c) 1997, 1998, 1999
3: * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. All advertising materials mentioning features or use of this software
14: * must display the following acknowledgement:
15: * This product includes software developed by Bill Paul.
16: * 4. Neither the name of the author nor the names of any co-contributors
17: * may be used to endorse or promote products derived from this software
18: * without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23: * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30: * THE POSSIBILITY OF SUCH DAMAGE.
31: *
32: * $FreeBSD: src/sys/dev/usb/if_auereg.h,v 1.17 2003/10/04 21:41:01 joe Exp $
33: * $DragonFly: src/sys/dev/netif/aue/if_auereg.h,v 1.4 2004/02/11 15:05:03 joerg Exp $
34: */
35:
36: /*
37: * Register definitions for ADMtek Pegasus AN986 USB to Ethernet
38: * chip. The Pegasus uses a total of four USB endpoints: the control
39: * endpoint (0), a bulk read endpoint for receiving packets (1),
40: * a bulk write endpoint for sending packets (2) and an interrupt
41: * endpoint for passing RX and TX status (3). Endpoint 0 is used
42: * to read and write the ethernet module's registers. All registers
43: * are 8 bits wide.
44: *
45: * Packet transfer is done in 64 byte chunks. The last chunk in a
46: * transfer is denoted by having a length less that 64 bytes. For
47: * the RX case, the data includes an optional RX status word.
48: */
49:
50: #define AUE_UR_READREG 0xF0
51: #define AUE_UR_WRITEREG 0xF1
52:
53: #define AUE_CONFIG_NO 1
54: #define AUE_IFACE_IDX 0
55:
56: /*
57: * Note that while the ADMtek technically has four
58: * endpoints, the control endpoint (endpoint 0) is
59: * regarded as special by the USB code and drivers
60: * don't have direct access to it. (We access it
61: * using usbd_do_request() when reading/writing
62: * registers.) Consequently, our endpoint indexes
63: * don't match those in the ADMtek Pegasus manual:
64: * we consider the RX data endpoint to be index 0
65: * and work up from there.
66: */
67: #define AUE_ENDPT_RX 0x0
68: #define AUE_ENDPT_TX 0x1
69: #define AUE_ENDPT_INTR 0x2
70: #define AUE_ENDPT_MAX 0x3
71:
72: #define AUE_INTR_PKTLEN 0x8
73:
74: #define AUE_CTL0 0x00
75: #define AUE_CTL1 0x01
76: #define AUE_CTL2 0x02
77: #define AUE_MAR0 0x08
78: #define AUE_MAR1 0x09
79: #define AUE_MAR2 0x0A
80: #define AUE_MAR3 0x0B
81: #define AUE_MAR4 0x0C
82: #define AUE_MAR5 0x0D
83: #define AUE_MAR6 0x0E
84: #define AUE_MAR7 0x0F
85: #define AUE_MAR AUE_MAR0
86: #define AUE_PAR0 0x10
87: #define AUE_PAR1 0x11
88: #define AUE_PAR2 0x12
89: #define AUE_PAR3 0x13
90: #define AUE_PAR4 0x14
91: #define AUE_PAR5 0x15
92: #define AUE_PAR AUE_PAR0
93: #define AUE_PAUSE0 0x18
94: #define AUE_PAUSE1 0x19
95: #define AUE_PAUSE AUE_PAUSE0
96: #define AUE_RX_FLOWCTL_CNT 0x1A
97: #define AUE_RX_FLOWCTL_FIFO 0x1B
98: #define AUE_REG_1D 0x1D
99: #define AUE_EE_REG 0x20
100: #define AUE_EE_DATA0 0x21
101: #define AUE_EE_DATA1 0x22
102: #define AUE_EE_DATA AUE_EE_DATA0
103: #define AUE_EE_CTL 0x23
104: #define AUE_PHY_ADDR 0x25
105: #define AUE_PHY_DATA0 0x26
106: #define AUE_PHY_DATA1 0x27
107: #define AUE_PHY_DATA AUE_PHY_DATA0
108: #define AUE_PHY_CTL 0x28
109: #define AUE_USB_STS 0x2A
110: #define AUE_TXSTAT0 0x2B
111: #define AUE_TXSTAT1 0x2C
112: #define AUE_TXSTAT AUE_TXSTAT0
113: #define AUE_RXSTAT 0x2D
114: #define AUE_PKTLOST0 0x2E
115: #define AUE_PKTLOST1 0x2F
116: #define AUE_PKTLOST AUE_PKTLOST0
117:
118: #define AUE_REG_7B 0x7B
119: #define AUE_GPIO0 0x7E
120: #define AUE_GPIO1 0x7F
121: #define AUE_REG_81 0x81
122:
123: #define AUE_CTL0_INCLUDE_RXCRC 0x01
124: #define AUE_CTL0_ALLMULTI 0x02
125: #define AUE_CTL0_STOP_BACKOFF 0x04
126: #define AUE_CTL0_RXSTAT_APPEND 0x08
127: #define AUE_CTL0_WAKEON_ENB 0x10
128: #define AUE_CTL0_RXPAUSE_ENB 0x20
129: #define AUE_CTL0_RX_ENB 0x40
130: #define AUE_CTL0_TX_ENB 0x80
131:
132: #define AUE_CTL1_HOMELAN 0x04
133: #define AUE_CTL1_RESETMAC 0x08
134: #define AUE_CTL1_SPEEDSEL 0x10 /* 0 = 10mbps, 1 = 100mbps */
135: #define AUE_CTL1_DUPLEX 0x20 /* 0 = half, 1 = full */
136: #define AUE_CTL1_DELAYHOME 0x40
137:
138: #define AUE_CTL2_EP3_CLR 0x01 /* reading EP3 clrs status regs */
139: #define AUE_CTL2_RX_BADFRAMES 0x02
140: #define AUE_CTL2_RX_PROMISC 0x04
141: #define AUE_CTL2_LOOPBACK 0x08
142: #define AUE_CTL2_EEPROMWR_ENB 0x10
143: #define AUE_CTL2_EEPROM_LOAD 0x20
144:
145: #define AUE_EECTL_WRITE 0x01
146: #define AUE_EECTL_READ 0x02
147: #define AUE_EECTL_DONE 0x04
148:
149: #define AUE_PHYCTL_PHYREG 0x1F
150: #define AUE_PHYCTL_WRITE 0x20
151: #define AUE_PHYCTL_READ 0x40
152: #define AUE_PHYCTL_DONE 0x80
153:
154: #define AUE_USBSTS_SUSPEND 0x01
155: #define AUE_USBSTS_RESUME 0x02
156:
157: #define AUE_TXSTAT0_JABTIMO 0x04
158: #define AUE_TXSTAT0_CARLOSS 0x08
159: #define AUE_TXSTAT0_NOCARRIER 0x10
160: #define AUE_TXSTAT0_LATECOLL 0x20
161: #define AUE_TXSTAT0_EXCESSCOLL 0x40
162: #define AUE_TXSTAT0_UNDERRUN 0x80
163:
164: #define AUE_TXSTAT1_PKTCNT 0x0F
165: #define AUE_TXSTAT1_FIFO_EMPTY 0x40
166: #define AUE_TXSTAT1_FIFO_FULL 0x80
167:
168: #define AUE_RXSTAT_OVERRUN 0x01
169: #define AUE_RXSTAT_PAUSE 0x02
170:
171: #define AUE_GPIO_IN0 0x01
172: #define AUE_GPIO_OUT0 0x02
173: #define AUE_GPIO_SEL0 0x04
174: #define AUE_GPIO_IN1 0x08
175: #define AUE_GPIO_OUT1 0x10
176: #define AUE_GPIO_SEL1 0x20
177:
178: struct aue_intrpkt {
179: u_int8_t aue_txstat0;
180: u_int8_t aue_txstat1;
181: u_int8_t aue_rxstat;
182: u_int8_t aue_rxlostpkt0;
183: u_int8_t aue_rxlostpkt1;
184: u_int8_t aue_wakeupstat;
185: u_int8_t aue_rsvd;
186: };
187:
188: struct aue_rxpkt {
189: u_int16_t aue_pktlen;
190: u_int8_t aue_rxstat;
191: };
192:
193: #define AUE_RXSTAT_MCAST 0x01
194: #define AUE_RXSTAT_GIANT 0x02
195: #define AUE_RXSTAT_RUNT 0x04
196: #define AUE_RXSTAT_CRCERR 0x08
197: #define AUE_RXSTAT_DRIBBLE 0x10
198: #define AUE_RXSTAT_MASK 0x1E
199:
200: #define AUE_TX_LIST_CNT 1
201: #define AUE_RX_LIST_CNT 1
202:
203: struct aue_softc;
204:
205: struct aue_chain {
206: struct aue_softc *aue_sc;
207: usbd_xfer_handle aue_xfer;
208: char *aue_buf;
209: struct mbuf *aue_mbuf;
210: int aue_idx;
211: };
212:
213: struct aue_cdata {
214: struct aue_chain aue_tx_chain[AUE_TX_LIST_CNT];
215: struct aue_chain aue_rx_chain[AUE_RX_LIST_CNT];
216: struct aue_intrpkt *aue_ibuf;
217: int aue_tx_prod;
218: int aue_tx_cons;
219: int aue_tx_cnt;
220: int aue_rx_prod;
221: };
222:
223: #define AUE_INC(x, y) (x) = (x + 1) % y
224:
225: struct aue_softc {
226: #if defined(__FreeBSD__) || defined(__DragonFly__)
227: #define GET_MII(sc) (device_get_softc((sc)->aue_miibus))
228: #elif defined(__NetBSD__)
229: #define GET_MII(sc) (&(sc)->aue_mii)
230: #elif defined(__OpenBSD__)
231: #define GET_MII(sc) (&(sc)->aue_mii)
232: #endif
233: struct arpcom arpcom;
234: device_t aue_miibus;
235: usbd_device_handle aue_udev;
236: usbd_interface_handle aue_iface;
237: u_int16_t aue_vendor;
238: u_int16_t aue_product;
239: int aue_ed[AUE_ENDPT_MAX];
240: usbd_pipe_handle aue_ep[AUE_ENDPT_MAX];
241: int aue_unit;
242: u_int8_t aue_link;
243: int aue_if_flags;
244: struct aue_cdata aue_cdata;
245: struct callout_handle aue_stat_ch;
246: #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
247: struct mtx aue_mtx;
248: #endif
249: u_int16_t aue_flags;
250: char aue_dying;
251: struct timeval aue_rx_notice;
252: };
253:
254: #if 0
255: #define AUE_LOCK(_sc) mtx_lock(&(_sc)->aue_mtx)
256: #define AUE_UNLOCK(_sc) mtx_unlock(&(_sc)->aue_mtx)
257: #else
258: #define AUE_LOCK(_sc)
259: #define AUE_UNLOCK(_sc)
260: #endif
261:
262: #define AUE_TIMEOUT 1000
263: #define AUE_BUFSZ 1536
264: #define AUE_MIN_FRAMELEN 60
265: #define AUE_INTR_INTERVAL 100 /* ms */
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