src/sys/dev/raid/twe/twe.c - diff

Return to twe.c CVS log

Up to [DragonFly] / src / sys / dev / raid / twe

version 1.5, 2004/01/05 17:40:00	version 1.6, 2004/03/02 20:55:10
Line 560 twe_ioctl(struct twe_softc *sc, int cmd,	Line 560 twe_ioctl(struct twe_softc *sc, int cmd,
case TWEIO_AEN_WAIT:	case TWEIO_AEN_WAIT:
s = splbio();	s = splbio();
while ((*arg = twe_dequeue_aen(sc)) == TWE_AEN_QUEUE_EMPTY) {	while ((*arg = twe_dequeue_aen(sc)) == TWE_AEN_QUEUE_EMPTY) {
error = tsleep(&sc->twe_aen_queue, PRIBIO \| PCATCH, "tweaen", 0);	error = tsleep(&sc->twe_aen_queue, 0 \| PCATCH, "tweaen", 0);
if (error == EINTR)	if (error == EINTR)
break;	break;
}	}
Line 900 twe_wait_request(struct twe_request *tr)	Line 900 twe_wait_request(struct twe_request *tr)
twe_startio(tr->tr_sc);	twe_startio(tr->tr_sc);
s = splbio();	s = splbio();
while (tr->tr_status == TWE_CMD_BUSY)	while (tr->tr_status == TWE_CMD_BUSY)
tsleep(tr, PRIBIO, "twewait", 0);	tsleep(tr, 0, "twewait", 0);
splx(s);	splx(s);

return(0);	return(0);
Line 965 twe_reset(struct twe_softc *sc)	Line 965 twe_reset(struct twe_softc *sc)
/*	/*
* Sleep for a short period to allow AENs to be signalled.	* Sleep for a short period to allow AENs to be signalled.
*/	*/
tsleep(NULL, PRIBIO, "twereset", hz);	tsleep(NULL, 0, "twereset", hz);

/*	/*
* Disable interrupts from the controller, and mask any accidental entry	* Disable interrupts from the controller, and mask any accidental entry