--- src/sys/i386/apic/Attic/mpapic.c	2005/11/04 08:57:24	1.15
+++ src/sys/i386/apic/Attic/mpapic.c	2005/11/05 01:30:26	1.16
@@ -44,9 +44,7 @@
  * pointers to pmapped apic hardware.
  */
 
-#if defined(APIC_IO)
 volatile ioapic_t	**ioapic;
-#endif	/* APIC_IO */
 
 /*
  * Enable APIC, configure interrupts.
@@ -86,6 +84,14 @@ apic_initialize(void)
 	lapic.lvt_lint1 = temp;
 
 	/*
+	 * Mask the apic error interrupt, apic performance counter
+	 * interrupt, and the apic timer interrupt.
+	 */
+	lapic.lvt_error = lapic.lvt_error | APIC_LVT_MASKED;
+	lapic.lvt_pcint = lapic.lvt_pcint | APIC_LVT_MASKED;
+	lapic.lvt_timer = lapic.lvt_timer | APIC_LVT_MASKED;
+
+	/*
 	 * Set the Task Priority Register as needed.   At the moment allow
 	 * interrupts on all cpus (the APs will remain CLId until they are
 	 * ready to deal).  We could disable all but IPIs by setting