Re: Call for testers: new pci code

[Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>]

:Hi all,
:
:After some additional work, I integrated Polakov's new pci code ported
:from FreeBSD 7.2:
:http://gitweb.dragonflybsd.org/~sephe/dragonfly.git/shortlog/refs/heads/pci
:
:I have tested SMP+IOAPIC, SMP+ICU, UP (there is not improvement in
:IOAPIC in this branch; my boxes just work with the current IOAPIC :)
:CARDBUS and PCCARD is tested on an old Dell laptop.
:
:I am currently running it on all of my boxes :)
:
:Though it should be safe to be tested, but I still suggest you to keep
:one copy of your working kernel and module!
:I also suggest to test it with HPET enabled.
:
:If there are any problems, please post the boot verbose dmesg first :)
:
:Best Regards,
:sephe

    Here is the output for a SMP build on my new Phenom-based shuttle test
    box, without APIC_IO and with APIC_IO.

    With SMP, without APIC_IO (works normally):

	fetch http://apollo.backplane.com/DFlyMisc/dmesg01.boot

    With SMP, With APIC_IO (did not work before, does not work now):

	fetch http://apollo.backplane.com/DFlyMisc/dmesg02.boot

    With APIC_IO the AHCI device seems to route its interrupt ok.
    However, just about everything else is still broken.  i.e. NFE,
    EHCI, etc... all route to irq 2 and are broken.  I guess that
    is to be expected at this stage?.  It never worked with APIC_IO
    before and still doesn't :-)

    There is an ACPI entry for the HPET but I don't see any recognition of
    it as a clock source.

    In anycase, the machine boots without APIC_IO like it always has but
    I'm not sure if there is some sort of loader.conf option I need to set
    to test the new code or not.

					-Matt
					Matthew Dillon 
					<dillon@backplane.com>