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systimer01.patch available for review.

From: Matthew Dillon <dillon@xxxxxxxxxxxxxxxxxxxx>
Date: Mon, 26 Jan 2004 14:46:57 -0800 (PST)

    This is what I've been working on for the last few days.  It isn't ready
    for prime time yet, but it is rapidly approaching that end.



	* The PC speaker is disabled (I use Timer2 as a free running counter)
	* The code will probably not work on SMP builds yet, but it's close.

    This is what the patch does:

	* Introduces systimers.  These are dyamic interrupt-driven timers. 
	  They replace the old fixed periodic 'hardclock' interrupt that
	  exists now and allow per-cpu multiple periodic or one-shot timer
	  interrupts to be registered with the system.  Systimers operate
	  outside the MP lock, so any code developed to use it has to be
	  MP safe.  Systimers are intended to be able to make use of per-cpu
	  timers (e.g. LAPIC), when available, and will eventually be 
	  augmented to use them.

	* Removes all the old hardclock and statclock cruft, including the
	  IPI clock forwarding hacks, and use systimers instead.

	* The hardclock, statclock, and scheduling (round-robin) clocks are
	  now per-cpu systimer based architecture-independant entities.  Work
	  on making them entirely MP safe proceeds.

	* Removes timecounters and introduces a single set of cputimer
	  variables and a cputimer procedural abstraction, which is based
	  on the 8254 Timer2 for the moment.

	  I'm working on adding additional time sources back in (e.g.
	  TSC, ACPI timer), but that work will not make the first commit.
	  Basically the additional time sources will all run in parallel.
	  The current code goes a long ways towards isolating the 
	  corrective action of a foreign time counter because 8254
	  Timer2 (which I use now), is already 'foreign' from the point
	  of view of Timer0.  It won't take much work to go the rest of
	  the distance.

	* Fixes time glitches from long interrupt disablement periods.  We
	  can now properly update the time and recover from anything up to
	  27ms worth of glitch.

	* Fixes the CAM code to use microuptime() instead of microtime(), so
	  glitches in the time do not screw up the CAM code.

	* Rewrite the nano/micro[up]time() functions.

    The final patch will also permanently fix nanosleep() to actually time
    the requested interval down to a few microseconds of granularity.  The
    current patch rips out the 8254-based PLL used for nanosleep() (but not
    the one used for NTPD support), but it won't matter once nanosleep() is

    I am not entirely sure if it's legal to use the 8254 in SWSTROBE mode on
    all platforms.  I'm a bit worried about old 486 platforms which might have
    8253's intead of 8254's.  If it doesn't work I'll switch to using
    RATEGEN mode.  I might do that anyway.


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